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General • Re: Writing READ_ADDR while DMA runs

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I need to gracefully transition from full speed phase to deceleration ramp. dma_channel_abort looks too disruptive. Who knows how long it will take? How quickly I can resume DMA after that? Will delay between motor pulses be too big? How can I calculate the exact motor position after that?
I am now thinking of rewriting step table in RAM ahead of DMA pointer. Or, may be, somehow quickly switching from one PIO to another.
Is there some well known solution for doing that on 2040?

Statistics: Posted by jhnlmn — Tue May 21, 2024 12:20 am



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