I want to design a PCB and use RP2350 with all Bank 0 GPIOs as 1V8.
I have studied all the docs I could grab (datasheet, HW design guide, Pico 2 example PCB), but some questions remain unclear.
1. QSPI as 3V3 and GPIOs as 1V8?
Am I correct to "assume", that external QSPI and PSRAM could run at 3V3 (via QSPI_IOVDD set at 3V3)?
But all the IOVDD are set to 1V8.
What about the 2nd nCS signal for the PSRAM (coming from bank 0)? It would come as 1V8, e.g. to a PSRAM QSPI chip, with QSPI on 3V3.
Would it work?
Or would it mean: run also QSPI (and PSRAM with 2nd nCS) also at 1V8?
(OK, using 1V8 also for QSPI flash and PSRAM is fine by me - is it a "must" if IOVDD is 1V8 to use also 2nd QSPI (PSRAM) as 1V8?)
2. SWD logic levels:
I have not found any info in datasheet if and how IOVDD would affect the SWD signals:
Are these signals on a bank? (e.g. Bank 0 or Bank 1, powered by QSPI_IOVDD...)?
If I power IOVDD with 1V8 but bank 1 (for QSPI external flash) with 3V3 - what are the logic levels for SWD?
BTW: If I use the Raspberry Pico debugger dongle - would it be agnostic to the SWD signals (they have a pull-up, so debugger could see
what the logic level is. Would it change (or allow to change) to use SWD signals as 1V8?
3. CMOS oscillator on XIN (with 1V8)?
I want to use a CMSO digital oscillator, connected on XIN (XOUT open).
Datasheet talks about crystals (XTAL) and they have to be "re-tuned" (if using a different type instead of "suggested").
What about to run a CMOS clock generator, on XIN only, running from 1V8?
Is there a need to "re-tune" the XTAL again? (I do not have an XTAL, instead an OSC)
Can I provide a 1V8 digital clock on XIN? (instead of using a XTAL)?
Datasheet is not very detailed here, just telling me: "running XTAL not with 3V3 - it needs a 're-tune'". But a "re-tune" with a digital OSC?
And what is the signal level required for XIN?
Are there any ideas, hints, experiences... with running the RP2350 with almost all as 1V8?
(I know, USB needs still 3V3 and the 1V1 is generated by the SMPS, DVDD).
Thank you.
I have studied all the docs I could grab (datasheet, HW design guide, Pico 2 example PCB), but some questions remain unclear.
1. QSPI as 3V3 and GPIOs as 1V8?
Am I correct to "assume", that external QSPI and PSRAM could run at 3V3 (via QSPI_IOVDD set at 3V3)?
But all the IOVDD are set to 1V8.
What about the 2nd nCS signal for the PSRAM (coming from bank 0)? It would come as 1V8, e.g. to a PSRAM QSPI chip, with QSPI on 3V3.
Would it work?
Or would it mean: run also QSPI (and PSRAM with 2nd nCS) also at 1V8?
(OK, using 1V8 also for QSPI flash and PSRAM is fine by me - is it a "must" if IOVDD is 1V8 to use also 2nd QSPI (PSRAM) as 1V8?)
2. SWD logic levels:
I have not found any info in datasheet if and how IOVDD would affect the SWD signals:
Are these signals on a bank? (e.g. Bank 0 or Bank 1, powered by QSPI_IOVDD...)?
If I power IOVDD with 1V8 but bank 1 (for QSPI external flash) with 3V3 - what are the logic levels for SWD?
BTW: If I use the Raspberry Pico debugger dongle - would it be agnostic to the SWD signals (they have a pull-up, so debugger could see
what the logic level is. Would it change (or allow to change) to use SWD signals as 1V8?
3. CMOS oscillator on XIN (with 1V8)?
I want to use a CMSO digital oscillator, connected on XIN (XOUT open).
Datasheet talks about crystals (XTAL) and they have to be "re-tuned" (if using a different type instead of "suggested").
What about to run a CMOS clock generator, on XIN only, running from 1V8?
Is there a need to "re-tune" the XTAL again? (I do not have an XTAL, instead an OSC)
Can I provide a 1V8 digital clock on XIN? (instead of using a XTAL)?
Datasheet is not very detailed here, just telling me: "running XTAL not with 3V3 - it needs a 're-tune'". But a "re-tune" with a digital OSC?
And what is the signal level required for XIN?
Are there any ideas, hints, experiences... with running the RP2350 with almost all as 1V8?
(I know, USB needs still 3V3 and the 1V1 is generated by the SMPS, DVDD).
Thank you.
Statistics: Posted by tjaekel — Thu Sep 12, 2024 2:38 am