I decided that the easiest option was to set pio_sm_set_enabled to false and let the dma handle the toggling of the state machine through dma_channel_start. The iterations are controlled by a simple loop with dma_channel_wait_for_finish_blocking blocking until the IRQ signal is sent from the pio program that it is finished. I haven't fully tested this out, but the (unverified) jitter between repetitions seem to be around 9 cycles (2 cycles for loop, 5 cycles for dma_channel_start, and 2 cycles for dma_channel_wait_for_finish_blocking), which is acceptable for pulse sequence repitition rates of (hopefully) no more than 100kHz. Using wrapping would probably be a better solution (2 cycles jitter), but unfortunately I am using both scratch registers for the detection of the terminating pulse sequence instruction and can't sacrifice them as a loop counter.
Statistics: Posted by ZimZim — Thu Apr 24, 2025 12:50 am