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General • Re: HSTX issue

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Interesting, I've tried other values and at some patterns it continues to send the clock after finished (otherwise correct sequence).

0xA0A0A0A0 - oscillates after
0xF0F0F0F0 - behaves somewhat normal (still leaves the line high)

Try to send a 0 immediately afterwards, it should stabilize.

P.S. It looks like it repeats the first 2 bits when FIFO gets empty, though not generating external clock. Try 0x4.... then 0xC...

Captures with clock enabled on the next line:
RP2350_HSTX_DDR-0xA0A0A0A0.png
RP2350_HSTX_DDR-0xF0F0F0F0.png

Statistics: Posted by gmx — Sun Jun 07, 2026 11:53 pm



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