I think it's consistent with that long, wide track sandwiched between groundplanes that spurs off the clock heading towards the bootmode button. Probably, fixing that will get rid of the need for CLKDIV.CLKDIV 8 is a little bit low, in 03h mode it should work up to 50 MHz.
More concerning is the need for PICO_BOOT_STAGE2_CHOOSE_GENERIC_03H - there's no explanation for why that is needed, as all four I/O lanes are apparently connected correctly and the Winbond part is fitted. Maybe worth going even slower on the clock to see if that goes away, otherwise there's something unexplained going on.
Statistics: Posted by arg001 — Wed Feb 05, 2025 9:48 am