on the pi2-pi4 range, and maybe the pi5, there are ~8 timers
the VPU has 4 compare registers, called ST_C0 thru ST_C3, which will each fire a unique interrupt, when it matches ST_CLO
at least one of those is in use by the VPU firmware, so youll need to move to the next one
originally (on the pi1), the arm core took one of those for its own use
but starting on the pi2, it was upgraded to 4 arm cores
and for complex reasons, external IRQ's, such as the VPU timers, can only be routed to a single core
so to support per-core timers, the proper ARM timers got added, and the VPU timers have just been ignored
so you might have 3 VPU timers available for use by your code
https://github.com/librerpi/rpi-tools/b ... .c#L19-L27
and this code is for reading ST_CLO on a pi5
so you might find the C0 thru S3 on the 5 as well
the VPU has 4 compare registers, called ST_C0 thru ST_C3, which will each fire a unique interrupt, when it matches ST_CLO
at least one of those is in use by the VPU firmware, so youll need to move to the next one
originally (on the pi1), the arm core took one of those for its own use
but starting on the pi2, it was upgraded to 4 arm cores
and for complex reasons, external IRQ's, such as the VPU timers, can only be routed to a single core
so to support per-core timers, the proper ARM timers got added, and the VPU timers have just been ignored
so you might have 3 VPU timers available for use by your code
https://github.com/librerpi/rpi-tools/b ... .c#L19-L27
and this code is for reading ST_CLO on a pi5
so you might find the C0 thru S3 on the 5 as well
Statistics: Posted by cleverca22 — Tue Nov 25, 2025 9:24 am